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Research & Scholarly Activity

 

PATENT/DISCLOSURE LIST

(1) A. Bindal, 鈥淪idewall Lithography for Growing Horizontal Carbon Nano Tubes and a Process Flow for Complementary Carbon Nano Tube Field Effect Transistor (CCFET) Fabrication鈥�, provisional patent application, Oct. 2003, serial no: 60/512,137.

(2) A. Bindal, 鈥淎 Self-Assisted Lithography for Manufacturing Nano-Interconnects and  Catalyst Islands for Growing Carbon Nano Tubes鈥�, provisional patent application, Oct. 2003, serial no: 60/510,276.

(3) A. Peleg, M. Mittal, L. Mennemeier, B. Eitan, C. Dulong, E. Kowashi, W. Witt, D. Lin, A. Bindal, 鈥淎n Apparatus For Performing Multiply-Add Operations on Packed Data鈥�, Feb. 1996, No. 6,035,316.

(4) A. Bindal, 鈥淢OS Channel Device with Counterdoping of Ion Implant for Reduced Substrate Sensitivity鈥�, Aug. 1996, No. 5,548,148.

(5) A. Bindal, C. Galli, N. Rovedo, 鈥淭hin SOI Layer for Fully Depleted Field Effect Transistors鈥�, Nov. 1993, No. 5,264,395.

(6) A. Bindal, J. Currie, 鈥淣itride Polish Stop for Forming SOI Wafers鈥�, Nov. 1993, No. 5,262,346.

(7) A. Bindal, S. Ogura, 鈥淎 Symmetrical FET Structure Using Reverse Sidewall Image Transfer Technique for CMO S6x (Leff = 0.1 to 0.15 um)鈥�, Dec. 1991, Disclosure No: FI8-91-0850.

(8) A. Bindal, S. Ogura, 鈥淪elf-Aligned, Double-gated, Fully-depleted SOI FET with 500 A Body Thickness鈥�, Dec. 1991,Disclosure No: FI8-92-0008.

(9) A. Bindal, C. Galli, S. Ogura, 鈥淪ub-quarter micron Asymmetrical FET Using Sidewall Image Transfer (SIT) Technology鈥�, Feb. 1992, Disclosure No: FI8-91 Disclosure No: FI8-91-0607.