Semiconductors & Micro/Nanotechnology
Fortifying U.S. Microelectronics Capacity
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91做厙 semiconductor excellence means meeting the federal CHIPS and Science Act by driving self-sufficiency and diversity in our national computer chip workforce, specialized applied research, and by advancing the Silicon Valley entrepreneurial pipeline. Our micro- and nanotechnology research extends this expertise into microscale fabrication, advanced materials and emerging applications across science and engineering.
As a partner in the Department of Defense California-Pacific Northwest AI Hardware Hub, we characterize and model cryogenic CMOS down to 4.2K for space and quantum computer applications. Simulation data are also generated to augment machine learning model creation for semiconductor yield improvement and physics discovery in novel transistors.
Below is a rotating selection of our standout investigators in these areas.
Research Strength: Energy Solutions
Research Strength: Machine Learning
Research Strength: Quantum Technology
Selected Publications
Li, H., Lomsadze, B., Moody, G., Smallwood, C., and Cundiff, S. (2023). . Oxford University Press.
Parent, D., et al. (2021). . 2021 IEEE Frontiers in Education Conference.
Smallwood, C., et al. (2025). . Physical Review B 112.
Wong, H. (2026). . IEEE Electron Devices Reviews.
Wong, H. (2025). . Springer International Publishing.
Wong, H. (2024). , Second Edition. Springer International Publishing.
Award Highlights
Oh, Smallwood, Wolcott, Keles, MRI Track #1 Acquisition of Tip-Enhanced Raman Spectroscopy for Research and Education at San Jos矇 State University NSF, 2023
Del Casino, Parent, Rosenfeld, Project Engineering Success: Increasing Hispanic Student Success in Engineering at San Jos矇 State University, San Jos矇 City College & Gavilan College DoE, 2022
Hurst, Wong, NRT-QL: A Program for Training a Quantum Workforce NSF, 2021
Lee, Oh "Effect of Cyclic Mechanical Stress on Ionic Conduction in Composite Polymer Electrolytes for Solid-State Batteries" NSF, 2021
Lee, Parent, Micro Maker Space for Semiconductor Prototyping U.S. Congress Community Project Funding, 2026
Parent, Lee, Han, Oh, "Acquisition of an Automated Multipurpose Furnace and Reactive Ion Etcher System for Microscale Fabrication Education and Research at 91做厙" DoD, 2021
Rosenfeld, Parent, "SPARTAN SPARK: Stimulating Passion, Advancement, Research, and Knowledge for Next-generation Engineers in Advanced Energy Systems Chemical and Materials Engineering" DoE, 2025
Wong, "Collaborative Research: Elements: Empowering Semiconductor Device Research and Education through Integrated Machine Learning Models and Database" NSF, 2024
Wong, "Cryogenic Characterization and Modeling of MST Devices and Analog Circuits Augmented with TCAD-enabled Machine Learning" Atomera, Inc., 2024
Innovations
Variable Channel Doping in Vertical Transistor [pdf]
A practical and efficient solution for enhancing the performance of power transistors.
Affiliates
Featured Faculty
John Lee
Professor of Mechanical Engineering
Microfluidics, Microfabrication Processes, Hemodynamics, Mechanics of Soft Materials,
Multiphysics Simulation, Microelectromechanical Systems (MEMS)
ORCID: 0000-0003-4522-0560
David Parent
Professor of Electrical Engineering
Semiconductor Fabrication, Stochastic Processing, Neuromorphic Engineering, Student
Success, HSI, IC Design
ORCID: 0000-0002-9396-6925
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Associate Professor of Physics and Astronomy
Optical Spectroscopy, Materials Science, Quantum Information, Condensed Matter Physics,
Quantum Optics
ORCID: 0000-0002-4103-8748
Hiu Yung Wong
Professor of Electrical Engineering
TCAD, Quantum Computing, Superconducting and Spin Qubits, Simulation Augmented Machine
Learning, Cryogenic Electronics, (Ultra) Wide Bandgap Device
ORCID: 0000-0003-0135-7469
Potential collaborators and members of the media may contact us at officeofresearch@sjsu.edu.